EDN

Focus is on the best ASIC design flow

System-on-programmable-chip technology has characteristics of both board-based design and ASIC-based system-on-a-chip ASIC design. The immediate attraction of SoPC is that, like a breadboard, the ...
EDN

Agere to pull Cadence partitioning, sign-off tool into ASIC flow

ALLENTOWN, Pa. — Agere Systems is working with San Jose, California-based Cadence Design Systems Inc. to provide Agere ASIC customers with access to Cadence's “First Encounter” EDA software. This is ...
Business Wire

ProDesign Joins Synopsys in-Sync Program to Enable Unified ASIC Prototyping and Verification; Common ASIC Flow Optimized for Customer Productivity

SAN JOSE, Calif.--(BUSINESS WIRE)--April 4, 2005--ProDesign USA, a leading supplier of high-speed FPGA-based ASIC verification platforms, today announced that it has joined the Synopsys in-Sync(R) ...
Electronic Design

Structured ASICs

So what’s a STRUCTURED ASIC? A Structured ASIC is a type of integrated circuit that contains blocks of logic, called "tiles." These tiles reside in the die ready to be connected in a customizable ...
Electronic Design

Flow Software Cuts ASIC Modelling Time

It is important to model an SoC well in advance to avoid costly over design or insufficient performance and to create a hardware emulation on which representative end user applications can be run. It ...